On the fab floor, a wafer that’s just come out of the rinse is nowhere near done. Water marks, micro-particles, and thermal stress from a sloppy dry cycle can kill yield before you even get to the next step. The real challenge isn’t just getting the water off—it’s doing it with full control over the surface and your thermal budget. What matters, technically We build the dry around controlled, fast energy delivery. The system holds wafer-level thermal uniformity at ±0.1°C, so you don’t get hot and cold spots that can cause photoresist reflow or stress-induced slip. The heaters use short-wave and medium-wave infrared, with quartz components and carbon fiber elements for a quick ramp and a stable hold. That keeps particle generation at zero during the bake, which is what you need to stay inside cleanroom Class 1–100 constraints. You end up with repeatable contact angle control and residue-free surfaces, every run. Why this fits the flow After cleaning, the wafer has to hit lithography or the photoresist bake without any contamination—and without a thermal history that will bite you on linewidth or adhesion. Our drying approach drops straight into the track or a stand-alone module, and it keeps soft bake and hard bake profiles tight and repeatable. You get predictable cycle times, less scrap from water marks and particles, and steady uptime. And because the temperature control is fast and precise, energy use stays tight—less thermal overhead without slowing throughput. Here are the practical details When you install, you have to match chamber exhaust and gas flow to the heater’s power envelope, so the setpoint holds under load. The interfaces are SEMI-compliant, but you still need to match the stage thermal mass to the profile to avoid overshoot. Plan on a short commissioning run to tune ramp rates and soak times for your specific resist stack.